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30 Comments
- geminitojanus, on 10/12/2007, -0/+37"If they put this into production, can they finally start calling it Pentium 5?"
It'll never go into production. The problem with this chip is that it's a research chip like Polaris (Intel's Terascale research project's chip). You can make a wafer or two of them (at a few million dollars), but once you want to scale it up to a production line the technology to assure yields just isn't there (yet). By the time we *do* get there with Through Silicon Vias (TSVs) or optical stacking interconnects (silicon lasers and photodiodes used for layer bonding instead of metal-metal contacts), Netburst will be so old as to not warrant reproduction. For the record, these chips were created sometime in 2000-2003, and studied before results were first published in 2004 and further expanded in 2006 with Black's second report on 3D architectures.
Netburst lent itself well to being a 3D chip because of its particular deep pipelining; the pipeline depth assured a huge number of in-flight operations, but it also meant huge wire delays, which 3D architectures could alleviate some of that stress (ironically, along with high-K, which would mean a 45nm Netburst chip might perform quite well; Tulsa (65nm, ~150W, approx. 45W lost to gate leak) made on a high-K 45nm process would use an estimated 75-85W of power at the same clock and lower voltage). Core and modern architectures have much shorter pipelines and would need more work to make sensible for use with 3D architectures.
We've hit and passed the magical mythical physics wall of transistor construction to where now when we shrink transistors we can either make them faster or use less power and not both at the same time. Netburst relied heavily on the fact the two were somehow linked and would remain linked from the transitions from 180nm to 130nm and 130nm to 90nm, and failed very much because of this underlying fact. - markp93, on 10/12/2007, -0/+12I'm still waiting for the Intel Sexium to come out.
- Dgen_X, on 10/12/2007, -1/+9Well the centrino duo is the processor right? Then what's the Core?
And if it has the core 2 duo it should be centrino 2 duo 2 right?
and...
What is the core 2...like a pentium? is it as good as a pentium?
These are the questions I face every day due to Intel's name structure, I just hope to god that they don't implement something like this, because they would use some ***** up name for it...like "Pentium Core Trio D E8320" (which would be a step down from the E8300) - thenativeraver, on 10/12/2007, -2/+10What about pentium 3D?
- geminitojanus, on 10/12/2007, -0/+7IBM is going to start sampling 3D TSV-based chips to its partners 2H07, but it's not likely to be any time soon that we see high volume production; there are still too many kinks to be worked out for the production line vs the laboratory. The main advantage everyone's seeking is the ability to stop manufacturing caches directly on die, and instead bonding them to the top of the chip via this process; because the cache-execution unit wires tend to be the longest, you can eliminate the most wire delay by moving the cache to the top of the processor instead of "beside" it.
Another interesting route to pursue would be developing a more "modular" technology; standardizing the pinout for these chips so you can bond different components directly to the top layer (for example, memory controllers) so that upgrading those components wouldn't require rearchitecting the chip (just the controller chip). But these technologies are for 201x. - geminitojanus, on 10/12/2007, -0/+5"The problem with modular technology is that it'd be made for the convenience of interchanging parts, not for performance/power reasons"
Right now turnaround times on a CPU architecture is about 18 months, and it can't really be rushed. Changing a component like a memory controller means re-taping out the die and redoing pretty much all of your verification steps. Moving out your more frequently changing components to a separate die and bonding them after the fact could reduce turn around times by as much as 12 months under ideal circumstances (all you'd have to do is verify the new core works, and verify the chip will bond correctly to the old die).
You could use this same idea with caches; take your older cores, bond a newly printed cache to the top, get rid of your old backlog quickly. Or, no longer do you have to bother with making new "Celeron"-level chips, bond a smaller cache to the top (using less silicon), get it out the door. Remember, CPU vendors are businesses, they're not always gunning for the #1 slot in performance, but for the #1 slot in sales. Modular components means quicker time to market and better targeted sales. - simmersiz, on 10/12/2007, -9/+14Perhaps the main problem with this is the cooling - which is a huge bottleneck to performance increase.
Ever wonder why chips aren't made in 3d (as cubes, which would maximize volume and therefore allow for more transistors)?
Its because cooling is more important and a bigger issue for performance than transistor count -
Cooling is surface area related, not volume related. - doug102, on 10/12/2007, -0/+3I'd like to see what the datapath looks like for the 3D stacking. Even if it doesn't go into production, I'm sure we will see some of these concepts in processors in a couple years.
- RicktheBrick, on 10/11/2007, -0/+3All that power and nothing to do. Those microprocessors would be idle most of the time for the average users. It is already like that with computers that are a couple of years old or newer. What the average user would appreciate would be non-volatile memory and faster broadband. These two advances would make an average computer seem much faster to the average user than 4 microprocessors.
- TheTankengine, on 10/12/2007, -3/+6Your technical knowledge of all things computing is astounding. This will definitely work.
- PATSCRU, on 10/12/2007, -0/+3jesus christ gemini...that was one of the most beautiful digg posts i've ever read.
- Dgen_X, on 10/11/2007, -0/+3negative
we now have the "Pentium Dual-Core" ( http://en.wikipedia.org/wiki/Pentium_Dual_Core )
but there's no information about it on Intel's website...which is ***** crazy - geminitojanus, on 10/12/2007, -0/+2"The number one selling point of a CPU is performance."
Performance? What a great metric. So many ways to define performance, let's count them shall we?
In the "deep-embedded" sector, performance is measured in watts. TSVs and stacked dice wins this war hands down; your heat generation is reduced because the long wires are replaced with shorter, less heat producing wires between the levels.
In the mobile-embedded sector, performance is battery life. Directly related to the heat output is the power input. Because less drive power is needed for a shorter wire than a longer one, you use less current driving the processor at the same speeds. Score two TSVs.
In the "pure mobile" market, performance is measured somewhat more complexly; battery life, heat production and instructions per cycle are all very important metrics. We've already established why this technology is great for the first two, the third comes from the fact you're no longer adding extra delay pipeline stages between your units to account for delays to RAM. TSVs win again.
In the desktop sector, we say goodbye to battery life and heat production and hello to instructions per cycle. Good news, TSVs scale upwards nicely; the maximum size of the top die is the same as the bottom die with this technology, so you could theoretically stack "dual core"/"quad core" processors on top of each other and bond them directly. Now you get better performance than current "Multi-chip Modules" because the wire delays are so much shorter, and the added benefits business-wise of being able to simply make one style of die, and stack them for more performance-related products. (Yet another win).
Any way you want to slice it, these technologies are good, but the one thing you need to remember is that companies sell ten times more of their cheaper processors than they do their expensive processors, period. People buying Dells and HPs of the world don't care what processor it has, just that it does its job with moderate speed. TSVs even fit these customers by making the chips cheaper to produce (using less silicon for the same performance), which means you can pass at least some of those savings on to the customer (if you're a nice company). "Celerons" today are made from electrically fusing processors that don't completely pass inspection at a higher speed grade to be lower speed-grade components, often times wasting huge amounts of silicon (disabling half a cache can easily disable 1/4th of the silicon; instead, you can use 3/4ths the silicon and make the same chip without losing money on re-engineering to make it possible). - stoppedcode12, on 10/12/2007, -1/+3The problem with modular technology is that it'd be made for the convenience of interchanging parts, not for performance/power reasons. (In fact, I'd be hard pressed if it won't have any performance penalties)
This 3d processing technology is great for cache, because it will allow big cache and low latency at the same time. If this process ever goes into production, it will most likely be seen POWER and SPARC. - geminitojanus, on 10/12/2007, -0/+2What we're talking about here is stacking transistors; current chips are made by building transistors along a common substrate (a silicon wafer), then layering over that with several layers of wires that connect them. To add more transistors, you have to increase the surface area of the chip.
Instead of this, engineers are working on a way of "stacking" a second layer of transistors on top of that first layer. But, in order to do that, you have to get through the substrate of the "top" chip of the stack. This is a problem currently; all semiconductors today are built with the one assumption that the substrate layer is holy. Any scratch, bump, uneven surface on that layer means bad chips which immediately translates to loss profits. In order to stack the dice however, you need to put a via through that layer, which means either dry etching ($$,$$$,$$$) or drilling ($,$$$,$$$), both of which are notorious for leaving "ragged edges" which, again, translates to immediate loss. The immediate answer is to "be careful", using high power lasers, vacuum systems and (at least in some experimental rigs) fluid lubricants to reduce damage to the wafers. Future solutions, ones more likely to go into production lines, will use dry etching processes like that from MEMS, where you etch holes with a highly charged plasmas or reactive ions.
While research chips can pull this off easily enough (with lots of hands on, hand holding of the machines), putting this into production is difficult, they simply aren't set up to do this kind of manufacturing. Even when they do get the proper equipment to do it, assuring yields is going to be an even bigger task as micromachining isn't nanomachining, and when we're talking about chips, we've been on the nano-scale for years now. Current via sizes are enormous, future vias need to be nearly feature-sized or last-generation feature-sized (as currently you have to do a lot of weird routing work to work around these huge no-fly zones where the TSVs have to be placed). - strangewill, on 10/12/2007, -0/+1As much as I hate to feel like a horrible idiot, I thought we were already doing this to some extent.
- thcobbs, on 10/12/2007, -1/+2Guess I already thought chips were done in 3D... but I guess this is something more than just the metal1 metal2.... etc layers that exist now.
- ScottMaximus1, on 10/12/2007, -0/+1I dugg it for pure effort
- FortyCaliber, on 10/12/2007, -3/+2Well, the PS3 came up with something similar: IBM and Toshiba's Cell processor... which sort of did the same thing; splitting processes between processors. I remember the console fags can telling me that my computer was obsolete because the Cell was "like 16 processors in one!"
I told them that they have no idea what the hell a Cell processor in and that the PS3 would be yesterday's news by the time it was released. I was right on both accounts. Sorry to Hijackt he thread: Back on track.
The idea is well founded but would require a major rehash of the OEM's and manufacturer's business model. With today's models it would be prohibitively expensive. All that aside:
There are a few things that would be extra awesome on that: Each processor would not have to be the same and each memory lane could house it's own memory speed without affecting the others. Example: You could assign all games to the kick-ass processor and memory but assign Office apps to the Budget CPU and memory. Each CPU would act independently, but could be interacting on a different layer. Also, the layer model map for the hardware would need to be rethought.
Another awesome thing would be to integrate the Video Graphics boards into ALL motherboards. This means all capacitors and pathways and connections but would omit the GPU and VRAM. Those things you would purchase seperately. Instead of a box with a card, you would buy a GPU packaged with some RAM and place it in the board. Of course, this means cooperation and standardization of sockets (but we know how that will go) and since AMD owns ATI now... abviously AMD boards would probably exclusively house ATI GPUS and chipsets. Intel could package their ***** graphics on board but would be better inclined to open their boards to NVIDIA too. This would at least allow them a larger market share in the graphics add-on abilities.
PCI Express and Hyper Transport, by this time, would be dead technologies because the links between the CPUs would require a high throughput bus that could easily be extended to the peripheral slots.
Of course, audio add in could be just as easy as Graphics.
The biggest issue we are overlooking are the power requirements. You would probably need a power supply close to 3 times your current requirements.
But, it's still a great idea. - slearwig, on 10/12/2007, -2/+1...Or, apply each layer to a unidirectional convex-shaped substrate at the same area
along the vertical stack. - slearwig, on 10/12/2007, -2/+1Cooling doesn't have to be surface related if the vertical volume
has the proper shape. Vertical layers forming a convex or pyramid shape
may perhaps work, albeit at a reduced area per layer, but not as a "perfect cube". - gabrielsond, on 10/12/2007, -3/+2If they integrated the CPU and the heatsink/cooler they may be able to do amazing things. It may not be easy, but it may be a work of art.
- aceallways, on 10/12/2007, -4/+2Some would call it harsh, but I feel blocking you is completely merited...
blocked. - Gizza, on 10/12/2007, -4/+2@atrain (#6627331)
Intel have thrown out the Pentium name. They wouldn't bring it back. If anything this would be called the Intel Core 3D or something like that. - armourer, on 10/12/2007, -5/+3Congratulations,
that is easily the most contrived and thought out post on digg.
Unfortunately, it is also arguably the worst idea ever. - relic2279, on 10/12/2007, -3/+1@geminitojanus who said "Remember, CPU vendors are businesses, they're not always gunning for the #1 slot in performance, but for the #1 slot in sales."
The number one selling point of a CPU is performance. If you wanna sell, you need performance. There are niche market and business who your point would benifit, but performance benifits most of the majority. - cryptoki, on 02/01/2008, -10/+5My vision for computing is a motherboard with 4 or 5 pci-express slots, built in sata/ or sata raid with at least 5 ports, 2 eide ports for dvd drives (master and slave), room for 4 processors (a cube shape in the center of the board) with a super fan/cooler hovering over the 4 chips ( 4amd or 4intel), 450 watt power supply, and 4 memory slots that can fit 2 gig sticks each max.
The OS would be designed like this...
1. During the OS install the kernel and all its processes would be assigned to chip1 (permanently) (= two core processor plus 2 gigs of ram)
2. Each 2 gig memory module would be assigned to one chip (remember.. 4 total slots in all)
3. From that point on any software you installed; you would be given the choice to assign that process to chip 2, 3, or 4 (not permanent and can be changed at any time)
4. You could assign any peripherals, any hardware, to run off one one chip as well. (like that new video card etc)
5. With this type of architecture you could have multiple monitors streaming live digital tv, movies, games, and live video conferences all at the same time.
6. This coupled with verizons fttc fiber service, or comcasts new 50Mb/sec offering to compete with fttc (just announced yesterday, tech news world)... every home could have a super computer for a few thousand bucks or less.
The chips could be the mid priced amd/intel two core varieties for around 100 buck-ish each.
The secret would be to design a quad core chip bus system that would push the possiblilites, or how about imagining the option to combine all 4 chips and 8 gigs of ram to just one proccess...
wow...
I though of this becuase i heard that the playstation3 or xbox (not sure which) is designed with more that one processor.. or i least i thought i heard that somewhere.
The OS could be called Windows XS (for extreme) or whatever lol.. just havin fun .. l8tr
~peace... - atrain, on 10/12/2007, -8/+3I couldn't see it being called the Pentium 3D.
Currently, there is the Pentium D series, which is a P4. With 3D, For unknowledgeable consumers, it sounds like its a Pentium III with the "D" technology, whatever that may be. Then again, most consumers don't know what a Pentium 3 is... - cryptoki, on 02/01/2008, -7/+1The motherboard manufacturers could make this a reality..., and btw, didn't IBM announce some sort of fiber optic chip too???
- airwalkery2k, on 10/12/2007, -10/+2If they put this into production, can they finally start calling it Pentium 5?
