TEM imaging of the nanosheets revealed individual silicon atoms.
How will Huawei even recover?
The real headline with IBM’s 7A chip is their claim that two transistors were wafer-bonded together. That implies alignment accuracy at a level never before achieved in wafer-to-wafer bonding — orders of magnitude better than what existing technology was thought capable of delivering.
Users praised IBM's wafer bonding and nanosheet stacking for 7A chips as a surprising innovation and miracle of US tech progress.
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@lithos_graphein wafer bonding to stack individual nanosheets? that cant be right
@teortaxesTex how does this relate to Huawei? Cause IBM showed results first with logic folding?? orrr am i not picking up the sarcasm??
@jwt0625 It's why they're calling it nanostack and no CFET.
https://research.ibm.com/blog/what-is-a-nanostack
The TEM image of IBM’s 7A chip reveals individual silicon (Si) atoms in the nanosheet. IBM is using wafer bonding to stack the nanosheets here, effectively doubling the transistor count.
@lithos_graphein that implies crazy bonding requirements, probably 10x better than hybrid bonding.. I'll to ask folks around
@IHateZuckSoMuch 2031
@jwt0625 1000x. Sounds crazy. 1um > 1nm
@AnalysisOp @jwt0625 they had the first 2nm nanosheet prototype as well.
@lithos_graphein Yes, but is it #MadeInAmerica?
@lithos_graphein @jwt0625 You are a GREAT source of info pal, glad to follow you
@Cursed___Prince Yes, this is a similar project
@lithos_graphein Triilion chip when
@Midori_Hound @jwt0625 yes of course, its 2 wafers not 6.
@jwt0625 @lithos_graphein If I'm reading the IBM post correctly, I think the wafer-to-wafer bonding is not stacking the individual nanosheets making up the transistor, but is used to create the "nanostack" which is stacking the arrays of fabricated nanosheet devices as part of the larger architecture.
@lithos_graphein @jwt0625 It's crazy. It's a miracle 😌 Didn't know IBM was in the edge at such level. I though it was a "boomer" company. To live to learn
@teortaxesTex It will be 6 years till someone start mass manufacture of it. 😔 Huawei got plenty of time.
@lithos_graphein Can you say that they are bonding based on this TEM picture.
@lithos_graphein LOOL 🔥
@AnalysisOp @jwt0625 Thank you Alex! appreciate you.
@teortaxesTex This is cool! But if it does actually become a part of a chip. It will more than likely still be implemented by TSMC at this rate … sometime between 2031-2036.
