The startup targets workload co-optimization to accelerate AI training.
Great to see our vision of end-to-end chip design featured in @eetimes. Thanks to @sallywf for the excellent profile.
Traditional chip design costs too much time and money. By changing that, we're enabling truly transformative applications of AI that were previously impossible.
https://www.eetimes.com/startup-ricursive-to-create-an-end-to-end-ai-model-for-chip-design/
Users appreciate Ricursive's AI for speeding up chip design because it tackles hardware scaling bottlenecks and leads to enjoyable explanatory discussions.
At Ricursive, we are accelerating the inner loop of AI evolution through chip design. If you speed up training and test time by a multiplier, designing a new model can be sped up by a multiplier!
Thank you, @sallywf from EE Times for a thoughtful piece on @RicursiveAI! https://www.eetimes.com/startup-ricursive-to-create-an-end-to-end-ai-model-for-chip-design/
@Azaliamirh @RicursiveAI You are welcome and thanks for taking the time to explain it to me! I really enjoyed the conversation.
@Azaliamirh @sallywf @RicursiveAI this is massive, hardware scaling is the real bottleneck lately
@sallywf @RicursiveAI Thanks for asking great questions! :)
@ChainZenit @sallywf @RicursiveAI Both scaling and time to design
@Azaliamirh @sallywf @RicursiveAI wait, the multiplier applies to the whole design loop not just training? that actually changes how i think about chip-agnostic optimizers
The startup targets workload co-optimization to accelerate AI training.
Great to see our vision of end-to-end chip design featured in @eetimes. Thanks to @sallywf for the excellent profile.
Traditional chip design costs too much time and money. By changing that, we're enabling truly transformative applications of AI that were previously impossible.
https://www.eetimes.com/startup-ricursive-to-create-an-end-to-end-ai-model-for-chip-design/
