Huawei's "LogicFolding" 3D-stacking approach aims to boost 7nm wafer utilization from 20% to over 70%

So Huawei is going for stacked small dies with Cerebras-style redundancy. It is, indeed, very clever if designed well. At the same error rate, they can go from like 20% to 70%+ wafer utilization. By EOY 2026, SMIC should have 100K WPM at 7nm. Millions of GPUs are doable.