Sharon Zhou Predicts Flops for Memory Tradeoffs in AI
AMD AI VP anticipates optimizations driven by shifting hardware costs.
TLDR
Sharon Zhou, VP of Engineering and AI at AMD and former Lamini CEO, posted that a large wave of algorithms, architecture changes, and performance optimizations will trade more flops for less memory. She linked the expected shift to the dropping relative cost of flops per token compared to HBM per token. Zhou said she is excited to see what gets invented. The post reflects her views drawn from her engineering background at Stanford, Google, and Harvard.
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