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48 Comments
- c0uchm0nster, on 10/12/2007, -4/+37Who the hell wrote the description for this, Yoda?
- eclectro, on 10/12/2007, -5/+23Complain about digg descriptions, you must not.
- ph713, on 10/12/2007, -0/+8
An interesting footnote: The 486SX actually had the co-processor built into it, just like the 486DX. The difference was that they clipped a wire on the 486SX to disable the co-proc, and then sold them cheaper. Just goes to show how marketing and pricing are often very disconnected from cost realities. - EricAnderton, on 10/12/2007, -2/+9Oh, some of us do. ;)
Of course I was too poor to afford a decent 80386 with a co-pro. Had to do all my heavy arithmetic in assembler, using fixed-point, on a 286, 6Mhz machine, using bitshifts and whatnot to overcome the painfully slow MUL and DIV instructions - and I was the lucky one.
I got that thing to draw half a dozen* solid filled polygons in 3d space in real time - it still didn't hold a candle to 2nd Reality of course.
Those were the days.
(* seriously: it tended to crap out around 7 or so) - pfister_, on 10/12/2007, -1/+8Coprocessors never went away, we just started calling them 3D accelerators. Aside from rendering 3D images, what algorithms commonly executed on a home computer nowadays are limited by the speed of floating point operations?
- EricAnderton, on 10/12/2007, -0/+6Off the top of my head, advantages of this for Joe Six-pack:
- Faster compression/decompression for lossy codecs (video, pictures, sound)
- Smaller file/bandwidth sizes, yet higher resolutions for the above.
- Software support for 3D graphics (fill in the gaps between GPU vendors, like D3D was originally supposed to do)
- Donate your computer's free time to science more effectively (SETI@home, Folding@home, RSA cracking, etc)
- Higher functioning AI in next generation video games.
- Potential lower power consumption for CPUs (especially in laptops) - eclectro, on 10/12/2007, -4/+9I don't think most of the digg crowd remembers math coprocessors, being whippersnappers and all.
- inactive, on 10/12/2007, -1/+5Wow, its been a while since I heard of these. If it does provide a nice increase of performance all the better. (Especially those games and encoding!)
- trogdor282, on 10/12/2007, -0/+4video compression, for one. but people are FINALLY starting to push that task onto the GPU, with impressive results. part of the problem i think was AGP, which has so little upstream bandwidth that it was only good for graphics. PCIe has much more general purpose potential.
- Ezku, on 10/12/2007, -1/+4Having first managed to get half the audience to google for "math coprocessor", you now have them wondering what 2nd Reality is. :)
- Nichevo, on 10/12/2007, -0/+3Many of the early 486sx had a separate socket on the motherboard for a math co-processor upgrade. I am pretty sure it went obsolete after the full dx chips arrived in full force.
- RobotCitizen, on 10/12/2007, -0/+2Not sure how this is different from the physics processors that we've heard about lately.
- alphamerik, on 10/12/2007, -0/+2RTFA: / The company targets high-performance computing applications - the kind of area AMD is keen to get Opteron chips into. /
i.e. Supercomputers
Look at the Top500 Supercomputers... AMDs are a very small share (10%)... Intel is kicking their ass in this field. - lbermude, on 10/12/2007, -0/+2I didn't have money for a co-processor either. Certain software required one so I had to run this program that emulated the co-processor in the cpu... man that was slow...
- TheSolomon, on 10/12/2007, -3/+5inkdeep - It's not a run-on sentence. The second sentence is complete, unlike the first. The title does produce headaches, regardless.
- digineer, on 10/12/2007, -0/+2You're absolutely correct... almost.
The integration will be in the form of a HyperTransport link between the CPU and the Clearspeed coprocessor. Instead, it will be treated like any other "peripheral" through memory mapped I/O. Except that it's on that high speed, low latency direct pipe to the CPU.
And, no instructions will be added to the CPU. (Can you imagine an assembly instruction to do something like a matrix multiply or FFT?) Because these are high-level operations which are being accelerated, someone or some company will likely provide standard APIs (like BLAS, FFTW, etc) that have been accelerated with the co-processor. The end-user's app will then just make use of the accelerated APIs. - zimm, on 10/12/2007, -0/+2you'll get better and faster game physics. and faster encoding.
even faster rendering depending on the engine being used. - EricAnderton, on 10/12/2007, -1/+3The (Intel co-authored) whitepaper for the CSX600 explains why this is a good idea in quasi-layman's speak:
http://www.clearspeed.com/downloads/Intel%20Math%20Kernel%20whitepaper.pdf
The concept didn't make much sense to me until I read this. Basically, the operations that the chip is designed to handle are things like vectors, FFTs and complex math - stuff that takes a *long* time using general purpose CPU instructions. Makes sense, since marshaling the data between the CPU cache and such a chip would be the slow part, so any gain would have to be wrought from in-depth calculations rather than basic arithmetic.
So my guess is: we'll see an instruction set expansion (remember MMX?) that will support this for specialized purposes, and AMD and Intel are going to butt heads with competing implementations. So I guess we'll see vendor library level support for this only (read: little to no compiler support).
Meanwhile, Clearspeed says that you can slap a couple CSX600's on an expansion card and be done with it:
http://www.clearspeed.com/downloads/AdvanceAcceleratorBoard.pdf - akeldama, on 10/12/2007, -4/+5Use math co-processors AMD might.
- TheRingo, on 10/12/2007, -0/+1I imagine it's just an issue of multiplying the roughly 1000 points of the complex point operation times the frequency to get the number of (regular) floating point operations. Honestly, I don't know much about it, but that's what makes sense to me.
- JayRod, on 10/12/2007, -1/+2Wasn't this used last on a 386 computer? The 386SX was just the CPU and the 386DX was with a math co-processor installed in another socket. Last I recall the 486 improved on it and had the co-processor built in. But it came in different flavors. The 486SX did not have a built in math co-processor and the 486DX did.
- arkanoid, on 10/12/2007, -0/+1I had to buy a 387 copro !
- ZoomBoy, on 10/12/2007, -0/+1Haha I remember my old 386 couldn't run a certain program because it didn't have one of these. Man!
- toastgodsupreme, on 10/12/2007, -2/+3Could someone explain what (if any) performance boost I'd see as an average user (browsing, gaming, video encoding, video playback)?
So far I only see this as mostly being directed towards server applications that tend to specifically benefit from this math co-proc. - dotpage, on 10/12/2007, -2/+3Wow, I can barelly remember my 386DX 40mhz with a killing Intel RapidCad coprocessor, it was a bullet rendering images on 3D Studio 3. Good times (sigh)
- geminitojanus, on 10/12/2007, -0/+1The Co-Processor AMD is talking about adding is an external Co-Processor, like the ol' *87. (The 8087 was originally /not/ an onboard component, rather an external chip, which was used with the 8086 and 8088 to do float point calculations).
The reason why it is offboard is because the chip they're talking about using is a 96-core, "tile" architecure chip (like the Cell processor). Instead of having one or two, more powerful FPUs, this chip has 96 much less powerful ones (each core has an integer MAC, dual FPU units and only 6Kb of "L1", the whole chip shares a 128Kb SRAM "L2"; the whole processor only clocks at 250MHz, meaning that it can be passively cooled and has incredibly low power consumption (~10W)). While you could build chips like this one into your core, it would take a significant amount of time to rework your core to support it. (Just look how long it took to develop the CELL, even with the much simpler PPC core at its heart).
Since Intel and AMD both are bitting at the chops to use this chip, it seems we might be seeing the FPU come back (though, more likely the chip in its current iteration will only see itself in high-end server systems, it's still very much overkill for a consumer desktop; building a super-computer with these chips could reduce your CPU cost by millions of dollars, instead of buying quad chip boxes, you could buy one way boxes and stick 4 cards with 4 of these processors each on them and get /more/ work done for /less/ power and cost). It should be noted that current chip has a DDR2 interface, and that the server co-processor prototype boards require their own onboard memory (it's a native 64-bit chip, which means it can address practically all of the ram you could possibly throw at it).
Also something worth noting; if you've ever read the book "Digital Fortress" by Dan Brown, he talks about a machine in it that the NSA built to do the otherwise impossibly difficult prime factorization for decrypting emails and encoded voice data. A super computer built with these chips would be fairly consistant to what was in the book (though the book states 3 million /CPUs/, if you were counting by cores, you'd only need 31,250 of these chips, which is a trivial yield and a pretty low cost for a defense project). - mccoma, on 10/12/2007, -0/+1I miss the Antic and Jay Miner
- Lynxpro, on 10/12/2007, -1/+2
I don't know how successful the math co-processors would truly be. Back in the Atari ST/Commodore Amiga days, hardly any software company - especially the game makers - wrote anything that took advantage of the optional Motorola 68881 and 68882 math co-processors that some people bought for their machines. I mean, on the ST side....what was there... GFA Basic and some of the Compilers and Assemblers that actually supported them? If memory serves correctly, it was the case for not just those two platforms but also on the Apple Macs at the time prompting Motorola to just integrate the formerly independent math coprocessor into the 68040 standard. What I would like to see are a new focus on integrated DSP chips standard with the computers...like how the NeXT cube and the Atari Falcon shipped the Motorola 56001 DSP standard. In its day, that DSP kicked serious bootie. - Lynxpro, on 10/12/2007, -1/+2
Can we bring back the BLitter chips too while we are at it??? - jeromehorwitz, on 10/12/2007, -0/+1Will Star Wars gags ever get old?
No, no they won't! - avonej, on 10/12/2007, -0/+1@ph713
That's not even the WORST part of it. Like you mentioned, the 486SX started off as a full-on 486DX with a malfunction in the FPU, which they disabled before shipping. For the people who had these processors and found out later they actually WANTED a math co-processor, Intel sold the 487SX. Here's were it gets interesting:
The 487SX was actually just a 486DX with an extra pin so it wouldn't fit in the same socket. When a user installed this "co-processor", it sent a signal to the existing 486SX to completely disable it. Then, the 487SX not only handled the floating point calculations, but also acted as the primary CPU for the computer. So, basically, they're original 486SX was just sitting there, not doing anything, while the 487SX did all the work (the same way the 486DX would've). - geminitojanus, on 10/12/2007, -0/+1Because that would take a lot of time to work out and a lot of time to redesign to make it work with your chips.
Think about the CELL processor; instead of having vector processors (SPEs), you'd have these tiny FPU cores. While IBM could wake up in a heartbeat and work this into their design, it would take a while for vendors like AMD and Intel to regear their cores to support something like this. Also, by embedding it on chip, you make the FPU cores run at the same speed as the rest of the chip, which would be super fast, but not thermally conscious (though selectively turning on and off the cores as needed would be nice, but then again..). It would simply be easier to integrate it off-core and selectively turn it on in software when you need certain accelerations.
Also it should be noted that this 96-core version is way, way overkill for a home desktop computer. I could see a 16-, or 32-core version of this making its way into home computers (probably clocking a bit faster at say 350MHz). Such a chip could be made small enough with Intel's 65nm process (or IBM's 90nm SOI process) to be stuck on a motherboard near-by the northbridge (or on an AMD system, adjacent to the HyperTransport bus with a ClearConnect-to-HyperTransport bus translation chip), and would offer significant speed ups to media playback.
Let's just say I don't expect Dell to be building these computers any time soon. - MrSketch, on 10/12/2007, -1/+1Put it in another core? With all these multi-core chips, why not just add a separate core for math co-processing? The company could license the design to AMD (and/or Intel, why not?) which puts in their chips without the need for separate boards or motherboard slots.
- teh_techie, on 10/12/2007, -2/+2How does the descriptions "25bn per second" come from this: ".....more than 10W yet delivers 250,000 1024-point complex floating point operations each second.
Unless 25bn means 250000.... MAYBE I'M WRONG? - bnolsen, on 10/12/2007, -1/+1I wonder how possible it would be to run a full OS on just a math unit. Make a new processor type with pretty much only FP instructions with absolute minimal integer instructions. With the stall in clock speed upgrades there should be a turn towards simplification & innovation (and of course getting away from the overly complex hacked x86 instruction set).
- toastgodsupreme, on 10/12/2007, -1/+1Found from:
http://www.mersenneforum.org/showthread.php?t=4740
"Board price was said to be somewhere "under $10K".
I have obtained clearer pricing details from Clearspeed on both chips and boards but think I should not advertise these until they make formal announcement."
So yeah... uhm, nevermind on buying one.
This was of course from Sept of last year. But I doubt it could've gone down into such a price range that it would be acceptable for even performance enthusiasts to justify buying one for their home machine. - FreyrVanir, on 10/12/2007, -1/+1Thats what I thought the article was about when I first read it. Take AMD's 4 core cpu and take out one of amds core and put this one in. 3amd/1clearspeed. I think AMD should keep on shrinking their cores then add special processor like a math co-processor or a PPU.
- tiuk, on 10/12/2007, -1/+1All I remember about math co-processors was the mobo for my old 386 had a socket for one. The only reason I remember that was I originally thought the socket was for a second CPU.
- WyllyWylly, on 10/12/2007, -1/+1@ skilzygw:
If AMD plays it smart, it will wind up on the die. That would eliminate one more bus and allow it to run at full CPU speed, removing one additional place for a bottleneck.
Find the balance between cost and performance, and the answer will be there too. If it costs more to redesign the die than it does to put it on a bus (Hypertransport?), it'll be sitting by itself. - zimm, on 10/12/2007, -3/+3gonna see alot more of this...
we're going down the reverse side of "putting everything into the cpu" phase.
cpu, gpu, fpu, npu, apu... thank you! come again! - pixelpimp, on 10/12/2007, -3/+2I was just thinking that Apple should bring back the math Co-Processor to make there Intel based Mac stand out from regular PC's with Intel chips. It would be amazing to have a Math Co-Procesor come back to suport th Main CPU and GPU!
- dhughes, on 10/12/2007, -3/+1 Holy 1994 Batman!
- skilzygw, on 10/12/2007, -7/+2Will this be an add-in card or on the cpu die?
What they showed was add in cards. That would be a big waste of time.
The only thing i rememeber about the math-co processor was my SoundBlaster software was in love with one.(If you remember that then you are an time PC user) - alphamerik, on 10/12/2007, -6/+0/wrong reply button
- inkdeep, on 10/12/2007, -10/+3I agree. It gave me a headache. Too, many commas, in the, wrong places, and, a f**ked up, run, on, sentence.
- dotpage, on 10/12/2007, -11/+4right you are, young Jedi
- TheStooge1, on 10/12/2007, -34/+8I just told her... she says "Hi"
- Matt2k, on 10/12/2007, -37/+8"If I die, tell my wife I said 'Hello.'"
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